The Radiation Group, Inc

Double upsets in the same word is important to calculate for large memory devices. Error Correction Codes (ECC) may not correct such errors.

The difference between 4-25 MeV/amu and > 100 MeV beams is in the ion range and its track structure. High beam energy ions (> 100 MeV/amu) have longer range and smaller track width. Range is important and affects charge collection; however, selection of an ion with a range > 30 or 40 um will be sufficient regardless of the ion beam energy. Track structure can upset many cells up to 20 cells in memories; it has been observed. So miss counting can give a difference in the cr...oss sections. Since 1972 or so, we have been using UC Berkeley & BNL beams at ~ 4 MeV/amu and TAMU beams at 15 and 25 MeV/amu for testing thousands of parts. Our rate predictions on Hughes/Boeing Satellites for ~ 75 satellite program were always on the money and there are some published papers about observations compared with prediction. I had/have no problem using TAMU beams and doing my predictions reliably. Differences in cross section Vs. LET specially in memories, are due to more than the ion energy (MeV/amu). I do not see an additional value in doing expensive testing at NSRL over TAMU.

Latchup occurs in CMOS devices. The building block for all CMOS devices is the inverter. An inverter is made of one PMOS and one NMOS transistor connected between the supply VDD and ground. The layout of this transistor pair forms a PNPN structure. A PNP and NPN pair of parasitic bipolar transistors are created, as shown in Figure 4. If the current gain product (1.2) of this pair is > 1.0 the pair is latchable. Latchup can occur by increasing the voltage across the tr...ansistor pair beyond a trigger voltage V_trigger. The current at this point is I_trigger. The voltage across the transistor pair drops and the current increases sharply. A voltage, V_hold, must remain across the pair of transistors in order to maintain latchup across the structure (~ 1.0V); at this point, a current of Ihopd must be maintained. If the voltage or current drops below V_hold and I_hold the latchup condition is removed and the inverter recovers to the off state. See more